Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAML11E14A/SERCOM0/SPI/INTENSET#0x0
SPI Interrupt Enable Set
Data Register Empty Interrupt Enable
Transmit Complete Interrupt Enable
Receive Complete Interrupt Enable
Slave Select Low Interrupt Enable
Combined Error Interrupt Enable
https://github.com/cmsis-svd/cmsis-svd-data